The level of integration of electronic circuits has been increasing for many years. The dimensions of circuit elements such as transistors, the dimensions of connecting structures, current intensity and voltage values are forever getting smaller. As a result of this there has been a rise in error frequency.
It is known to make circuits or parts of a circuit fault-tolerant in respect of a multitude of faults by tripling the circuits. A circuit S is tripled to give three circuits S1, S2 and S3, which are functionally equal to circuit S. The outputs of circuits S1, S2 and S3 are connected to a voter V which performs a majority decision. System triplication also called TMR has been described, for example, in Barry W. Johnson “Designs and Analysis of Fault Tolerant Digital Systems”, Addison Wesley Publ. Comp. Reading, Mass., 1989, p. 51-53 and U.S. Pat. No. 6,963,217 B2. A random fault in one of the three partial systems S1, S2 and S3, which for any given input value affects the output of one of circuits S1, S2 or S3, is tolerated by a TMR system.
In practical applications it is sometimes merely necessary for the fault-tolerant system to behave especially reliably only for the input of certain defined values, whilst for other input values no such high reliability of output values is required. For example, a circuit for triggering an airbag in cars should produce the control signals for tripping the airbag with an especially high degree of reliability when inputting the corresponding tripping signal, whilst production of the control signals for opening and closing the central locking system is not subject to such a high reliability requirement.
The disadvantage with the known triplication of a system with voter is the fact that it requires a great deal of hardware, that energy consumption is more than three times as high in comparison to the original system and in that it is not possible to vary the reliability for different input values which from the start require different reliability levels.